1. Field of the Invention
The present invention relates to a PLL apparatus in which a control voltage is supplied to a voltage-controlled oscillator according to an amplitude level of an external reference frequency signal.
2. Description of the Related Art
In base stations of next-generation mobile communication, digital terrestrial broadcasting, and so on, required precision of a frequency reference signal is becoming higher. As oscillators of the frequency reference signal, a cesium frequency reference oscillator, a rubidium frequency reference oscillator, a frequency-synchronous reference oscillator based on a GPS signal, and the like are used in systems in broadcasting and communication fields.
However, since these oscillators are generally expensive, reference signals from these oscillators are distributed and used as reference clocks of various kinds of communication systems. As an apparatus thus utilizing the reference signal (external reference signal) to use it in various kinds of communication systems, the present inventor has been considering an apparatus having the structure shown in FIG. 8, for instance, and this PLL apparatus 100 is disclosed in Patent Document 1. Components forming the PLL apparatus 100 will be described in an embodiment of the present invention and therefore, a detailed description thereof will be omitted here.
An outline of the operation of the PLL apparatus 100 will be described. A detector circuit 16 measures an amplitude level (detection voltage) of an external reference signal, and based on the detection voltage, a CPU 41 determines whether the level of the external reference signal falls within a proper range or out of the proper range. Then, when it is determined that the signal level falls within the proper range, a selection switch 15 is switched so that a signal output from a voltage-controlled oscillator 33 to devices (internal reference signal) synchronizes with the external reference signal. On the other hand, when it is determined that the signal level is out of the proper range, such synchronization does not take place and the selection switch 15 is switched so that an output from a fixed voltage supply unit 31 is supplied to the voltage-controlled oscillator 33.
A permissible range of the input level of the external reference signal varies depending on each user, 0 dBm±3 dB in some case or 10 dBm±3 dB in some other case. Therefore, there is a demand that the PLL apparatus 100 be designed so as to allow the input of external reference signals with a wide level range, for example, ranging from −3 dBm to +13 dBm. A possible solution for satisfying such a demand may be to provide a voltage shift circuit shifting an input voltage to the detector circuit 16 to a predetermined range. However, inputting external reference signals in such a wide level range to the PLL apparatus 100 involves a high probability that a relatively high-level signal is input to the apparatus. As a result, an input voltage to an inverter 13 on a preceding stage of a phase comparator 14 becomes an excessive input exceeding rating of the inverter 13. Further, an input voltage to an amplifier 12 becomes an excessive input exceeding rating of the amplifier 12, which involves a risk that the apparatus 100 gets out of order.
Therefore, the present inventor has been considering to provide an excessive input protection circuit 21 shown in FIG. 9 between a filter 11 and the amplifier 12. With the excessive input protection circuit 21 being provided, a current flows to diodes 22, 23 included in the excessive input protection circuit 21 when a signal having an amplitude level over a predetermined level is input from an oscillation source 10 of the external reference signal, which makes it possible to regulate the amplitude level of the frequency signal input to the inverter 13. FIG. 10(a) shows an example of a voltage waveform input to the amplifier 12 when the excessive input protection circuit 21 is not provided, and FIG. 10(b) shows an example of a voltage waveform input to the amplifier 12 when the excessive input protection circuit 21 is provided.
However, the diodes 22, 23 included in the excessive input protection circuit 21 have temperature characteristics, and their breakdown voltages change according to temperature, and according to this change, a characteristic of a detection voltage also changes. Concretely, even under the constant input level of the external reference signal to the PLL apparatus 100, when the temperature becomes high, a large amount of current flows to the diodes 22, 23 and accordingly the detection voltage decreases. FIG. 11 is a graph showing how a correlation between the input level of the external reference signal and the detection voltage changes at each temperature. When the correlation between the input level of the external reference signal and the detection voltage thus shifts according to temperature, the switching to the fixed voltage supply unit 31 takes place even though the amplitude level of the external reference signal is within a permissible range, or the switching to the fixed voltage supply unit 31 does not take place even though the amplitude level is out of the permissible range.
(Patent Document 1)    Japanese Patent Application Laid-open No. 2009-124600